1. Field of the Invention
This invention relates to lead frame packages, and more specifically to leadless semiconductor packages.
2. Description of the Related Art
Lead frame packages have been used for a long period of time in the IC packaging history mainly because of their low manufacturing cost and high reliability. Although the traditional lead frame packages have become gradually obsolete for some high performance-required packages, they still remains their market share as a cost-effective solution for low I/O ICs. Traditional lead frame package has its limit of providing a solution for chip scale and low profile package due to the long inner leads and outer leads. Therefore, the semiconductor packaging industry develops a leadless package without outer leads such that both the footprint and the package profile can be greatly reduced.
FIGS. 10 and 11 show a leadless package 10 wherein the leads 11a are disposed at the bottom of the package as compared to the conventional gull-wing or J-leaded type package. The die pad 11b of the leadless package 10 is exposed from the bottom of the package thereby providing better heat dissipation. Typically, there are four tie bars 11c being connected to the die pad 11b. The leadless package 10 includes a chip 12 sealed in a package body 13. The active surface of the chip 12 is provided with a plurality of bonding pads (not shown) electrically connected to the leads 11a via wire bonding.
Due to the elimination of the outer leads, leadless packages are featured by lower profile and weight. Furthermore, the leadless package 10 is also a cost-effective package due to its use of existing BOM (bill of materials). All the above-mentioned properties make the current leadless packages very suitable for telecommunication products such as cellular phones, portable products such as PDA (personal digital assistant), digital cameras, and IA (Information Appliance).
However, this conventional leadless package has various design and production limitations. For example, since only the bottom of the package is provided with the leads 11a for making external electrical connection, the package 10 can be mounted onto an external substrate (such as a printed circuit board (PC board)) only in a die up orientation. This limitation is especially apparent when the chip to be packaged is an image sensor chip which needs an opening sealed by a transparent lid formed in the package thereby allowing the image sensor chip to be exposed to the object to be sensed on an optical principle.